Job Requisition:Digital Design Engineer
Leidos is seeking a junior-to-mid level Digital Design Engineer to join our team in our Innovations Center (LInC) to work at a customer site on Kirtland Air Force Base under our Albuquerque, NM office. Our Leidos team has a contract to support the development of new modeling and simulation techniques to analyze the effectiveness of various electronics for payload and bus applications in spacecraft.
For this effort, we are seeking a full-time Field Programmable Gate Array (FPGA) programmer to take existing signal processing code written in MATLAB or C and convert it to run on a Xilinx, Microsemi, or similar FPGA, while optimizing performance. Later related efforts would involve converting other processing code, such as image processing, machine learning, data compression, guidance/navigation, and autonomy, to FPGA-based operation. This research would include developing suitable benchmarking to support performance comparisons.
Challenging stuff you will do on the job:
• Decipher algorithms applied in existing signal processing code, written in MATLAB or C.
• Perform logic design to accomplish deciphered signal processing algorithms; write VHDL code, logic simulation, synthesis, and testing for use within FPGA devices along with documentation to support the designs.
• Review and analyze requirements, participate in defining, deriving and allocating hardware requirements.
• Translate conceptual designs into detailed design specifications, electrical schematics, complete bills of materials (BOMs) and Printed Circuit Board Design (PCB) layout techniques, documents and drawings.
• Provide technical support for all phases of a project including scheduling, design, system test, cost estimates, engineering specifications and various drawings.
• Test and integrate hardware and software/firmware within complex electronic systems.
• Troubleshoot, improve and optimize designs from prototypes to matured products.
You will need these skills to be successful in this role:
• BS in Electrical or Computer Engineering with at least 2 years of experience with Digital Design and programming of FPGAs or Masters with less than 2 years of similar experience.
• Must be US Citizen with the ability to obtain and maintain a Top Secret clearance.
• Knowledge of digital logic design using VHDL with FPGA’s and/or Microcontrollers and associated tools (like Xilinx Vivado or Altera equivalent).
• Knowledge of VHDL simulation – using part vendor tools or third party (Xilinx simulator, Active HDL, ModelSim etc.).
• Knowledge of C/C++ and MATLAB software languages.
• Familiar with schematic capture tools like OrCAD Capture or equivalent.
• Basic knowledge of various test equipment – oscilloscope, voltmeter, logic analyzer.
You will wow us even more if you have these skills:
• Understanding of signal processing, image processing, machine learning, data compression, guidance/navigation, and autonomy algorithms.
External Referral Bonus:Ineligible
Potential for Telework:No
Clearance Level Required:None
Travel:Yes, 10% of the time
Scheduled Weekly Hours:40
Job Family:Engineering Design2000Leidos Innovations Center (LInC)
Leidos is a Fortune 500® information technology, engineering, and science solutions and services leader working to solve the world's toughest challenges in the defense, intelligence, homeland security, civil, and health markets. The company's 33,000 employees support vital missions for government and commercial customers. Headquartered in Reston, Virginia, Leidos reported annual revenues of approximately $10.19 billion for the fiscal year ended December 28, 2018. For more information, visit www.Leidos.com.
Pay and benefits are fundamental to any career decision. That's why we craft compensation packages that reflect the importance of the work we do for our customers. Employment benefits include competitive compensation, Health and Wellness programs, Income Protection, Paid Leave and Retirement. More details are available here.
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