The candidate supports applied research and engineering development of solutions and products in the fields of space and satellite systems, chemical, biological, radiation, and nuclear detection instrumentation from within the Leidos Innovation Center (LInC).
The candidate’s primary responsibility is to own the FPGA/HDL design, implementation, and verification of digital communications and signal processing logic. The candidate provides FPGA input during the PCB hardware design phase and is the FPGA/HDL owner of development activities. Work closely with the science and manufacturing departments to facilitate transition of technology from the research stage to full production. Support the PDR, CDR, and TRR phases of a program.
- BS degree and 4 - 8 years of prior relevant experience or Masters with 2 - 6 years of prior relevant experience. May possess a Doctorate in technical domain.
- Strong written and oral communication skills
- Experience with VHDL, Verilog, and/or System Verilog
- HDL testbench design, HDL design verification, regression testing
- Thorough knowledge of FPGA architecture, design optimization, timing closure
- Xilinx Vivado, Virtex 7/Ultrascale/Ultrascale+
- Experience with bring up and debugging activities of custom FPGA based PCBs
- Extensive experience with hardware debuggers, chip-scopes, on-chip simulators and debugging tools of various FPGA vendors
- Experience implementing digital interface standards in FPGA designs (SPI, UART, I2C, USB, Ethernet, 10GbE, PCIe)
- Experience working with cross functional R&D teams developing embedded hardware for FPGA deployed solutions
- Motivated self-starter able to work under minimal supervision
- Demonstrated leadership of small technical teams and projects
- Ability to hold a SECRET level security clearance
- Experience with Triple Module Redundancy (TMR) for space applications
- Experience with designing FPGAs for spacecraft
- Experience with signal processing algorithms, including FFTs, convolution, beamforming, IIR filters, peak signal detections, and their implementation in FPGAs
- Experience with Electro-optical systems
- Experience implementing interfaces such as Ethernet, Spacewire, GigE Vision, and CameraLink
- Experience with ARM Cortex-M microcontrollers (STM32, SiLabs, TI) is a plus
- Experience with OrCAD and PADS circuit design and layout tools for high speed digital designs is a plus
- Security clearance at the TOP SECRET level or above
External Referral Bonus
External Referral Bonus:Ineligible
Potential for Telework:No
Clearance Level Required:None
Travel:Yes, 10% of the time
Scheduled Weekly Hours:40
Job Family:Electrical Engineering
Leidos is a Fortune 500® information technology, engineering, and science solutions and services leader working to solve the world's toughest challenges in the defense, intelligence, homeland security, civil, and health markets. The company's 33,000 employees support vital missions for government and commercial customers. Headquartered in Reston, Virginia, Leidos reported annual revenues of approximately $10.19 billion for the fiscal year ended December 28, 2018. For more information, visit www.Leidos.com.
Pay and Benefits
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Commitment to Diversity
All qualified applicants will receive consideration for employment without regard to sex, race, ethnicity, age, national origin, citizenship, religion, physical or mental disability, medical condition, genetic information, pregnancy, family structure, marital status, ancestry, domestic partner status, sexual orientation, gender identity or expression, veteran or military status, or any other basis prohibited by law. Leidos will also consider for employment qualified applicants with criminal histories consistent with relevant laws.